Commit 1042b2b9 authored by Matt Roper's avatar Matt Roper
Browse files

drm/i915/tgl: Program MBUS_ABOX{1,2}_CTL during display init 



On gen11 we only needed to program MBus credits into MBUS_ABOX_CTL
during display initialization, but on gen12 we're now supposed to
program the same values into MBUS_ABOX1_CTL and MBUS_ABOX2_CTL as well.

v2:
 - Program registers with rmw to preserve contents of unrelated bits.
 - Switch to the new display uncore helpers.

Bspec: 49213
Bspec: 50096
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200204011032.582737-2-matthew.d.roper@intel.com


Reviewed-by: default avatarMatt Atwood <matthew.s.atwood@intel.com>
parent 837b63e6

drivers/gpu/drm/i915/display/intel_display_power.c

+4 −0
Original line number Diff line number Diff line
@@ -4498,6 +4498,10 @@ static void icl_mbus_init(struct drm_i915_private *dev_priv) 
		MBUS_ABOX_BW_CREDIT(1);



	intel_de_rmw(dev_priv, MBUS_ABOX_CTL, mask, val);

	if (INTEL_GEN(dev_priv) >= 12) {

		intel_de_rmw(dev_priv, MBUS_ABOX1_CTL, mask, val);

		intel_de_rmw(dev_priv, MBUS_ABOX2_CTL, mask, val);

	}

}



static void hsw_assert_cdclk(struct drm_i915_private *dev_priv)

drivers/gpu/drm/i915/i915_reg.h

+2 −0
Original line number Diff line number Diff line
@@ -2865,6 +2865,8 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) 
#define MI_ARB_STATE	_MMIO(0x20e4) /* 915+ only */



#define MBUS_ABOX_CTL			_MMIO(0x45038)

#define MBUS_ABOX1_CTL			_MMIO(0x45048)

#define MBUS_ABOX2_CTL			_MMIO(0x4504C)

#define MBUS_ABOX_BW_CREDIT_MASK	(3 << 20)

#define MBUS_ABOX_BW_CREDIT(x)		((x) << 20)

#define MBUS_ABOX_B_CREDIT_MASK		(0xF << 16)

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