Commit 837b63e6 authored Feb 03, 2020 by Matt Roper

drm/i915: Program MBUS with rmw during initialization



It wasn't terribly clear from the bspec's wording, but after discussion
with the hardware folks, it turns out that we need to preserve the
pre-existing contents of the MBUS ABOX control register when
initializing a few specific bits.

Bspec: 49213
Bspec: 50096
Fixes: 4cb4585e ("drm/i915/icl: initialize MBus during display init")
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200204011032.582737-1-matthew.d.roper@intel.com


Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>

parent f986ef2e

drivers/gpu/drm/i915/display/intel_display_power.c

+9 −5

Original line number	Diff line number	Diff line
		@@ -4486,14 +4486,18 @@ static void icl_dbuf_disable(struct drm_i915_private *dev_priv)

		static void icl_mbus_init(struct drm_i915_private *dev_priv)
		{
		u32 val;
		u32 mask, val;

		mask = MBUS_ABOX_BT_CREDIT_POOL1_MASK \|
		MBUS_ABOX_BT_CREDIT_POOL2_MASK \|
		MBUS_ABOX_B_CREDIT_MASK \|
		MBUS_ABOX_BW_CREDIT_MASK;
		val = MBUS_ABOX_BT_CREDIT_POOL1(16) \|
		MBUS_ABOX_BT_CREDIT_POOL2(16) \|
		MBUS_ABOX_B_CREDIT(1) \|
		MBUS_ABOX_BW_CREDIT(1);

		intel_de_write(dev_priv, MBUS_ABOX_CTL, val);
		intel_de_rmw(dev_priv, MBUS_ABOX_CTL, mask, val);
		}

		static void hsw_assert_cdclk(struct drm_i915_private *dev_priv)

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