Commit 0fde0b1d authored by Matt Roper's avatar Matt Roper
Browse files

drm/i915/tgl: Update cdclk voltage level settings 



A recent bspec update added an extra voltage level that we didn't have
on ICL and new criteria for selecting the level.

Bspec: 49208
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200207001417.1229251-2-matthew.d.roper@intel.com


Reviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
parent 9d5fd37e

drivers/gpu/drm/i915/display/intel_cdclk.c

+18 −1
Original line number Diff line number Diff line
@@ -1295,6 +1295,18 @@ static u8 ehl_calc_voltage_level(int cdclk) 
		return 0;

}



static u8 tgl_calc_voltage_level(int cdclk)

{

	if (cdclk > 556800)

		return 3;

	else if (cdclk > 326400)

		return 2;

	else if (cdclk > 312000)

		return 1;

	else

		return 0;

}



static void cnl_readout_refclk(struct drm_i915_private *dev_priv,

			       struct intel_cdclk_config *cdclk_config)

{
@@ -2711,7 +2723,12 @@ void intel_update_rawclk(struct drm_i915_private *dev_priv) 
 */

void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv)

{

	if (IS_ELKHARTLAKE(dev_priv)) {

	if (INTEL_GEN(dev_priv) >= 12) {

		dev_priv->display.set_cdclk = bxt_set_cdclk;

		dev_priv->display.modeset_calc_cdclk = bxt_modeset_calc_cdclk;

		dev_priv->display.calc_voltage_level = tgl_calc_voltage_level;

		dev_priv->cdclk.table = icl_cdclk_table;

	} else if (IS_ELKHARTLAKE(dev_priv)) {

		dev_priv->display.set_cdclk = bxt_set_cdclk;

		dev_priv->display.modeset_calc_cdclk = bxt_modeset_calc_cdclk;

		dev_priv->display.calc_voltage_level = ehl_calc_voltage_level;

drivers/gpu/drm/i915/display/intel_ddi.c

+3 −1
Original line number Diff line number Diff line
@@ -4238,7 +4238,9 @@ static bool intel_ddi_is_audio_enabled(struct drm_i915_private *dev_priv, 
void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv,

					 struct intel_crtc_state *crtc_state)

{

	if (IS_ELKHARTLAKE(dev_priv) && crtc_state->port_clock > 594000)

	if (INTEL_GEN(dev_priv) >= 12 && crtc_state->port_clock > 594000)

		crtc_state->min_voltage_level = 2;

	else if (IS_ELKHARTLAKE(dev_priv) && crtc_state->port_clock > 594000)

		crtc_state->min_voltage_level = 3;

	else if (INTEL_GEN(dev_priv) >= 11 && crtc_state->port_clock > 594000)

		crtc_state->min_voltage_level = 1;

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