spi: pxa2xx: Save other reg_cs_ctrl bits when configuring chip select (0e897218) · Commits · 戴 / test

Upcoming Intel platforms use LPSS SPI_CS_CONTROL register bits 15:12 for configuring the chip select polarities. Touch only chip select SW mode and state bits when enabling the software chip select control in order to not clear any other bits in the register. Signed-off-by:

Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by:

Mark Brown <broonie@kernel.org>

drivers/spi/spi-pxa2xx.c

+3 −1

Original line number	Diff line number	Diff line
		@@ -249,7 +249,9 @@ static void lpss_ssp_setup(struct driver_data *drv_data)
		drv_data->lpss_base = drv_data->ioaddr + config->offset;

		/* Enable software chip select control */
		value = SPI_CS_CONTROL_SW_MODE \| SPI_CS_CONTROL_CS_HIGH;
		value = __lpss_ssp_read_priv(drv_data, config->reg_cs_ctrl);
		value &= ~(SPI_CS_CONTROL_SW_MODE \| SPI_CS_CONTROL_CS_HIGH);
		value \|= SPI_CS_CONTROL_SW_MODE \| SPI_CS_CONTROL_CS_HIGH;
		__lpss_ssp_write_priv(drv_data, config->reg_cs_ctrl, value);

		/* Enable multiblock DMA transfers */

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