Commit 0b6cf36a authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'samsung-dt64-5.2-2' of... 

Merge tag 'samsung-dt64-5.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM64 changes for v5.2, second round

DTC warning fixes: move fixed-clocks, timer and pmu nodes outside of soc
node.

* tag 'samsung-dt64-5.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux

:
  arm64: dts: exynos: Move fixed-clocks out of soc
  arm64: dts: exynos: Move pmu and timer nodes out of soc

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 2abeb52e f36afdd0

arch/arm64/boot/dts/exynos/exynos5433.dtsi

+25 −24
Original line number Diff line number Diff line
@@ -23,6 +23,31 @@ 


	interrupt-parent = <&gic>;



	arm_a53_pmu {

		compatible = "arm,cortex-a53-pmu", "arm,armv8-pmuv3";

		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;

	};



	arm_a57_pmu {

		compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3";

		interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;

	};



	xxti: clock {

		/* XXTI */

		compatible = "fixed-clock";

		clock-output-names = "oscclk";

		#clock-cells = <0>;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;
@@ -237,35 +262,11 @@ 
		#size-cells = <1>;

		ranges;



		arm_a53_pmu {

			compatible = "arm,cortex-a53-pmu", "arm,armv8-pmuv3";

			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;

		};



		arm_a57_pmu {

			compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3";

			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;

		};



		chipid@10000000 {

			compatible = "samsung,exynos4210-chipid";

			reg = <0x10000000 0x100>;

		};



		xxti: xxti {

			compatible = "fixed-clock";

			clock-output-names = "oscclk";

			#clock-cells = <0>;

		};



		cmu_top: clock-controller@10030000 {

			compatible = "samsung,exynos5433-cmu-top";

			reg = <0x10030000 0x1000>;

arch/arm64/boot/dts/exynos/exynos7.dtsi

+29 −28
Original line number Diff line number Diff line
@@ -28,6 +28,23 @@ 
		tmuctrl0 = &tmuctrl_0;

	};



	arm-pmu {

		compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3";

		interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-affinity = <&cpu_atlas0>, <&cpu_atlas1>,

				     <&cpu_atlas2>, <&cpu_atlas3>;

	};



	fin_pll: clock {

		/* XXTI */

		compatible = "fixed-clock";

		clock-output-names = "fin_pll";

		#clock-cells = <0>;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;
@@ -77,12 +94,6 @@ 
			reg = <0x10000000 0x100>;

		};



		fin_pll: xxti {

			compatible = "fixed-clock";

			clock-output-names = "fin_pll";

			#clock-cells = <0>;

		};



		gic: interrupt-controller@11001000 {

			compatible = "arm,gic-400";

			#interrupt-cells = <3>;
@@ -469,28 +480,6 @@ 
			status = "disabled";

		};



		arm-pmu {

			compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3";

			interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-affinity = <&cpu_atlas0>, <&cpu_atlas1>,

					     <&cpu_atlas2>, <&cpu_atlas3>;

		};



		timer {

			compatible = "arm,armv8-timer";

			interrupts = <GIC_PPI 13

					(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,

				     <GIC_PPI 14

					(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,

				     <GIC_PPI 11

					(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,

				     <GIC_PPI 10

					(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;

		};



		pmu_system_controller: system-controller@105c0000 {

			compatible = "samsung,exynos7-pmu", "syscon";

			reg = <0x105c0000 0x5000>;
@@ -635,6 +624,18 @@ 
			};

		};

	};



	timer {

		compatible = "arm,armv8-timer";

		interrupts = <GIC_PPI 13

				(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 14

				(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 11

				(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 10

				(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;

	};

};



#include "exynos7-pinctrl.dtsi"

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