Commit 055d15a8 authored by Ulrich Hecht's avatar Ulrich Hecht Committed by Simon Horman
Browse files

ARM: dts: r8a7779: Add HSCIF0/1 device nodes



Based on Rev. 1.00 of the R-Car H1 datasheet.

Signed-off-by: default avatarUlrich Hecht <uli+renesas@fpond.eu>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent adbb78e1
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+26 −0
Original line number Diff line number Diff line
@@ -287,6 +287,32 @@
		status = "disabled";
	};

	hscif0: serial@ffe48000 {
		compatible = "renesas,hscif-r8a7779",
			     "renesas,rcar-gen1-hscif", "renesas,hscif";
		reg = <0xffe48000 96>;
		interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp0_clks R8A7779_CLK_HSCIF0>,
			 <&cpg_clocks R8A7779_CLK_S>,
			 <&scif_clk>;
		clock-names = "fck", "brg_int", "scif_clk";
		power-domains = <&cpg_clocks>;
		status = "disabled";
	};

	hscif1: serial@ffe49000 {
		compatible = "renesas,hscif-r8a7779",
			     "renesas,rcar-gen1-hscif", "renesas,hscif";
		reg = <0xffe49000 96>;
		interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp0_clks R8A7779_CLK_HSCIF1>,
			 <&cpg_clocks R8A7779_CLK_S>,
			 <&scif_clk>;
		clock-names = "fck", "brg_int", "scif_clk";
		power-domains = <&cpg_clocks>;
		status = "disabled";
	};

	pfc: pin-controller@fffc0000 {
		compatible = "renesas,pfc-r8a7779";
		reg = <0xfffc0000 0x23c>;