Commit 03750c37 authored by Anson Huang's avatar Anson Huang Committed by Shawn Guo
Browse files

arm64: dts: imx8mm: Move usdhc clocks assignment to board DT 



usdhc's clock rate is different according to different devices
connected, so clock rate assignment should be placed in board
DT according to different devices connected on each usdhc port.

Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Reviewed-by: default avatarAbel Vesa <abel.vesa@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent e045f044

arch/arm64/boot/dts/freescale/imx8mm-evk.dts

+4 −0
Original line number Diff line number Diff line
@@ -295,6 +295,8 @@ 
};



&usdhc2 {

	assigned-clocks = <&clk IMX8MM_CLK_USDHC2>;

	assigned-clock-rates = <200000000>;

	pinctrl-names = "default", "state_100mhz", "state_200mhz";

	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;

	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
@@ -306,6 +308,8 @@ 
};



&usdhc3 {

	assigned-clocks = <&clk IMX8MM_CLK_USDHC3_ROOT>;

	assigned-clock-rates = <400000000>;

	pinctrl-names = "default", "state_100mhz", "state_200mhz";

	pinctrl-0 = <&pinctrl_usdhc3>;

	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;

arch/arm64/boot/dts/freescale/imx8mm.dtsi

+0 −4
Original line number Diff line number Diff line
@@ -702,8 +702,6 @@ 
					 <&clk IMX8MM_CLK_NAND_USDHC_BUS>,

					 <&clk IMX8MM_CLK_USDHC1_ROOT>;

				clock-names = "ipg", "ahb", "per";

				assigned-clocks = <&clk IMX8MM_CLK_USDHC1>;

				assigned-clock-rates = <400000000>;

				fsl,tuning-start-tap = <20>;

				fsl,tuning-step= <2>;

				bus-width = <4>;
@@ -732,8 +730,6 @@ 
					 <&clk IMX8MM_CLK_NAND_USDHC_BUS>,

					 <&clk IMX8MM_CLK_USDHC3_ROOT>;

				clock-names = "ipg", "ahb", "per";

				assigned-clocks = <&clk IMX8MM_CLK_USDHC3_ROOT>;

				assigned-clock-rates = <400000000>;

				fsl,tuning-start-tap = <20>;

				fsl,tuning-step= <2>;

				bus-width = <4>;

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