Commit 012bf847 authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915/dsi: update some of the platform based checks 



Use the more customary order of latest platform first, and don't bother
with an if in the last branch.

Cc: Madhav Chauhan <madhav.chauhan@intel.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarMadhav Chauhan <madhav.chauhan@intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180705132509.12881-3-jani.nikula@intel.com
parent e518634b

drivers/gpu/drm/i915/vlv_dsi.c

+26 −30
Original line number Diff line number Diff line
@@ -550,12 +550,12 @@ static void intel_dsi_device_ready(struct intel_encoder *encoder) 
{

	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);



	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))

		vlv_dsi_device_ready(encoder);

	else if (IS_BROXTON(dev_priv))

		bxt_dsi_device_ready(encoder);

	else if (IS_GEMINILAKE(dev_priv))

	if (IS_GEMINILAKE(dev_priv))

		glk_dsi_device_ready(encoder);

	else if (IS_GEN9_LP(dev_priv))

		bxt_dsi_device_ready(encoder);

	else

		vlv_dsi_device_ready(encoder);

}



static void glk_dsi_enter_low_power_mode(struct intel_encoder *encoder)
@@ -938,11 +938,10 @@ static void intel_dsi_clear_device_ready(struct intel_encoder *encoder) 
{

	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);



	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv) ||

	    IS_BROXTON(dev_priv))

		vlv_dsi_clear_device_ready(encoder);

	else if (IS_GEMINILAKE(dev_priv))

	if (IS_GEMINILAKE(dev_priv))

		glk_dsi_clear_device_ready(encoder);

	else

		vlv_dsi_clear_device_ready(encoder);

}



static void intel_dsi_post_disable(struct intel_encoder *encoder,
@@ -1599,7 +1598,9 @@ static void intel_dsi_unprepare(struct intel_encoder *encoder) 
	enum port port;

	u32 val;



	if (!IS_GEMINILAKE(dev_priv)) {

	if (IS_GEMINILAKE(dev_priv))

		return;



	for_each_dsi_port(port, intel_dsi->ports) {

		/* Panel commands can be sent when clock is in LP11 */

		I915_WRITE(MIPI_DEVICE_READY(port), 0x0);
@@ -1617,7 +1618,6 @@ static void intel_dsi_unprepare(struct intel_encoder *encoder) 
		I915_WRITE(MIPI_DEVICE_READY(port), 0x1);

	}

}

}



static int intel_dsi_get_modes(struct drm_connector *connector)

{
@@ -1747,14 +1747,10 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv) 
	if (!intel_bios_is_dsi_present(dev_priv, &port))

		return;



	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {

		dev_priv->mipi_mmio_base = VLV_MIPI_BASE;

	} else if (IS_GEN9_LP(dev_priv)) {

	if (IS_GEN9_LP(dev_priv))

		dev_priv->mipi_mmio_base = BXT_MIPI_BASE;

	} else {

		DRM_ERROR("Unsupported Mipi device to reg base");

		return;

	}

	else

		dev_priv->mipi_mmio_base = VLV_MIPI_BASE;



	intel_dsi = kzalloc(sizeof(*intel_dsi), GFP_KERNEL);

	if (!intel_dsi)

CRA Git | Maintained and supported by SUSTech CRA and CCSE