driver: i2c: npcx: fix a glitch on SCL before stop condition.

In the npcx i2c FIFO mechanism, the hardware will release SCL bus
immediately after the driver reads data from FIFO. That's why we need
to hold SCL bus before configuring the next transaction. Once it was
done, the driver release the bus for the next transaction.

But during the last transaction, the driver releases SCL first then
starts a STOP condition. At this moment, the SCL is pulled high by PU
resistance and driven to low for generating STOP condition later. This
additional clock might influence some i2c devices if they don't reset
their state machine after receiving STOP.

This CL fixes this issue by two steps:
1. Distinguish that it's the last read transaction with STOP condition?
2. If so, issue STOP condition before reading FIFO instead of holding
   SCL bus. Then the hardware will generate it immediately after reading
   FIFO.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>