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Commit fc9e72c5 authored by Erwan Gouriou's avatar Erwan Gouriou Committed by Kumar Gala
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dts/bindings: clocks: Fix stm32f105 pll mul range 



PLL mul could be set up to 9.
Fix this.

Signed-off-by: default avatarErwan Gouriou <erwan.gouriou@linaro.org>
parent 8be1244c
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