Commit f48dfbf0 authored by Erwan Gouriou's avatar Erwan Gouriou Committed by Carles Cufi
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dts: bindings: entropy: stm32: Add description to clock property 



This addition should help users to better understand potential issues
with domain clock configuration.

Signed-off-by: default avatarErwan Gouriou <erwan.gouriou@linaro.org>
parent 8e5a2cd4

dts/bindings/rng/st,stm32-rng.yaml

+7 −0
Original line number Diff line number Diff line
@@ -13,6 +13,13 @@ properties: 


  clocks:

    required: true

    description: |

         Specifies the clock line to be enabled in clock controller as well as

         the clock domain used, for instance:

                   <&rcc STM32_SRC_MSI CLK48_SEL(3)> /* RNG clock domain set to MSI */

         A correctly configured domain clock is required to allow the integrated low

         sampling clock detection mecanism to behave properly.

         In provided example, MSI should be configured to provide 48Mhz clock.



  nist-config:

    type: int

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