drivers: spi: stm32h7: Avoid unnecessary FIFO flush
The RxFIFO is already flushed any time a transceive operation
finishes, there is no need for doing it also before the
transaction start.
The aim of this change is to simplify the logic and to
(potentially) reduce the minimum time between transactions.
Signed-off-by:
Daniel Gaston Ochoa <dgastonochoa@gmail.com>
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