boards: beaglev_fire: fix memory address

Per the docs, the memory at address 0x80000000 ends at 0xC0000000.
In other words, the address space is 0x40000000, which is only half
of the size we want to map. This means that the upper address space
previously mapped was overlapping with the space reserved for non-cached
memory.

Instead, we map the entire 2GB at 0x1000000000, which is the correct
address for cached DDR that occupies more than 1 GB.

We defined a new node in the device tree for this memory region,
`beaglev.ddr_cached_high`. We did not reuse the `soc` node because
we needed to redefine the `#address-cells` to be 2, and doing so
would have affected other nodes under `soc`.

Signed-off-by: Alex Charlton <alex.n.charlton@gmail.com>