soc: xtensa: imx8: Enable clock control on i.MX8QM/QXP

This commit enables clock control on the i.MX8QM and QXP boards.
This is achieved through the following changes:
	1) The "reg" property is no longer marked as required
	for the "nxp,imx-ccm" binding. This is necessary because
	in the case of i.MX8QM and i.MX8QXP the clock management
	is done through the SCFW, hence there's no need to access
	CCM's MMIO space (not that you could anyways).

	2) The DTS now contains a scu_mu node. This node refers
	to the MU instance used by the DSP to communicate with
	the SCFW.

	3) The CCM driver needs to support the LPUART clocks
	(which will be the only IP that's supported for now)
	and needs to perform an initialization so that the
	NXP HAL driver knows which MU to use to communicate
	with the SCFW.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>