soc/xtensa/intel_adsp/cavs: Support for code relocation

Basically:
  - Name RAMABLE_REGION as "RAM";
  - Insert the relocation hooks for gen_relocate_app.py.

Also, to help with "rimage" peculiarities, `fix_elf_addrs.py` changed to
not copy empty sections to output, as this would prevent someone trying
to move all of some section (such as BSS) to a different location and
reuse the platform linker script - which would generate an empty section
anyway.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>