Commit df4aa230 authored by Carlo Caione's avatar Carlo Caione Committed by Ioannis Glaropoulos
Browse files

arch: arm64: Use _arch_switch() API



Switch to the _arch_switch() API that is required for an SMP-aware
scheduler instead of using the old arch_swap mechanism.

SMP is not supported yet but this is a necessary step in that direction.

Signed-off-by: default avatarCarlo Caione <ccaione@baylibre.com>
parent fd155249
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+1 −2
Original line number Diff line number Diff line
@@ -14,8 +14,7 @@ zephyr_library_sources(
  irq_manage.c
  prep_c.c
  reset.S
  swap.c
  swap_helper.S
  switch.S
  thread.c
  vector_table.S
)
+2 −0
Original line number Diff line number Diff line
@@ -7,6 +7,8 @@ config CPU_CORTEX_A
	bool
	select CPU_CORTEX
	select HAS_FLASH_LOAD_OFFSET
	select USE_SWITCH
	select USE_SWITCH_SUPPORTED
	help
	  This option signifies the use of a CPU of the Cortex-A family.

+18 −4
Original line number Diff line number Diff line
@@ -88,10 +88,24 @@ SECTION_FUNC(TEXT, _isr_wrapper)
	cmp	x1, #0
	bne	exit

	/* Check if we need to context switch */
	ldr	x1, [x0, #_kernel_offset_to_current]
	ldr	x2, [x0, #_kernel_offset_to_ready_q_cache]
	cmp	x1, x2
	/*
	 * z_arch_get_next_switch_handle() is returning:
	 *
	 * - The next thread to schedule in x0
	 * - The current thread in x1. This value is returned using the
	 *   **old_thread parameter, so we need to make space on the stack for
	 *   that.
	 */
	stp	x1, xzr, [sp, #-16]!
	mov	x0, sp
	bl	z_arch_get_next_switch_handle
	ldp	x1, xzr, [sp], #16

	/*
	 * x0: 1st thread in the ready queue
	 * x1: _current thread
	 */
	cmp	x0, x1
	beq	exit

	/* Switch thread */

arch/arm/core/aarch64/swap.c

deleted100644 → 0
+0 −23
Original line number Diff line number Diff line
/*
 * Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com>
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <kernel.h>
#include <kernel_internal.h>

extern const int _k_neg_eagain;

int arch_swap(unsigned int key)
{
	_current->arch.swap_return_value = _k_neg_eagain;

	z_arm64_call_svc();
	irq_unlock(key);

	/* Context switch is performed here. Returning implies the
	 * thread has been context-switched-in again.
	 */
	return _current->arch.swap_return_value;
}
+13 −16
Original line number Diff line number Diff line
@@ -22,7 +22,6 @@
_ASM_FILE_PROLOGUE

GDATA(_kernel)
GDATA(_k_neg_eagain)

/**
 * @brief Routine to handle context switches
@@ -34,13 +33,12 @@ GDATA(_k_neg_eagain)
GTEXT(z_arm64_context_switch)
SECTION_FUNC(TEXT, z_arm64_context_switch)
#ifdef CONFIG_TRACING
	stp	x0, x1, [sp, #-16]!
	stp	xzr, x30, [sp, #-16]!
	bl	sys_trace_thread_switched_out
	ldp	xzr, x30, [sp], #16
	ldp	x0, x1, [sp], #16
#endif
	/* load _kernel into x0 and current k_thread into x1 */
	ldr	x0, =_kernel
	ldr	x1, [x0, #_kernel_offset_to_current]

	/* addr of callee-saved regs in thread in x2 */
	ldr	x2, =_thread_offset_to_callee_saved
@@ -58,13 +56,9 @@ SECTION_FUNC(TEXT, z_arm64_context_switch)
	mov	x1, sp
	str	x1, [x2]

	/* fetch the thread to run from the ready queue cache */
	ldr	x1, [x0, #_kernel_offset_to_ready_q_cache]
	str	x1, [x0, #_kernel_offset_to_current]

	/* addr of callee-saved regs in thread in x2 */
	ldr	x2, =_thread_offset_to_callee_saved
	add	x2, x2, x1
	add	x2, x2, x0

	/* Restore x19-x29 plus x30 */
	ldp	x19, x20, [x2], #16
@@ -152,7 +146,7 @@ SECTION_FUNC(TEXT, z_thread_entry_wrapper)

GTEXT(z_arm64_svc)
SECTION_FUNC(TEXT, z_arm64_svc)
	z_arm64_enter_exc x0, x1, x2
	z_arm64_enter_exc x2, x3, x4

	switch_el x1, 3f, 2f, 1f
3:
@@ -197,12 +191,15 @@ offload:
	b	inv

context_switch:
	/* Check if we need to context switch */
	ldr	x0, =_kernel
	ldr	x1, [x0, #_kernel_offset_to_current]
	ldr	x2, [x0, #_kernel_offset_to_ready_q_cache]
	cmp	x1, x2
	beq	exit
	/*
	 * Retrieve x0 and x1 from the stack:
	 *  - x0 = new_thread->switch_handle = switch_to thread
	 *  - x1 = x1 = &old_thread->switch_handle = current thread
	 */
	ldp	x0, x1, [sp, #(16 * 10)]

	/* Get old thread from x1 */
	sub	x1, x1, ___thread_t_switch_handle_OFFSET

	/* Switch thread */
	bl	z_arm64_context_switch
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