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Commit dd74db46 authored by Julien Massot's avatar Julien Massot Committed by Carles Cufí
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arch: arm: cortex_a_r: add MPIDR and SG1R definition 



These definitions are required to be able to use GICv3
interrupts controller on an ARMv8 AArch32 processor.

Signed-off-by: default avatarJulien Massot <julien.massot@iot.bzh>
parent d70a6ef7
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