boards: fix the sys ticks per second for emsk

As a slow FPGA platform with max. freq < 25 Mhz,
the default CON_SYS_CLOCK_TICKS_PER_SEC=10000 is
not suitable. CON_SYS_CLOCK_TICKS_PER_SEC=100 is
a better value.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>