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Commit d5c4bd68 authored by Jimmy Zheng's avatar Jimmy Zheng Committed by Fabio Baltieri
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soc: riscv: andes_v5: support RISC-V C extension 



Enable RISC-V C extension for Andes core.

Signed-off-by: default avatarJimmy Zheng <jimmyzhe@andestech.com>
parent 9c7f0376
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