intel_adsp: ace: Fix debug vector address

In ace15_mtpm the debug exception vector address is mapped to INTLEVEL4
and not INTLEVEL 6. This can be checked in the core-isa header:

"""
define XCHAL_DEBUG_VECTOR_VADDR        XCHAL_INTLEVEL4_VECTOR_VADDR
"""

in
modules/hal/xtensa/zephyr/soc/intel_ace15_mtpm/xtensa/config/core-isa.h

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>