Commit cd9ddc95 authored by Stephanos Ioannidis's avatar Stephanos Ioannidis Committed by Dan Kalowsky
Browse files

arch: arm: cortex_a_r: Fix mrc/mcr instruction usage 



The coprocessor number in ARM `mrc` and `mcr` instructions must be prefixed
with `p`.

GNU assembler allows specifying coprocessor number without the `p` prefix;
but, LLVM assembler is more picky about this and prints out "invalid
instruction" error otherwise.

Signed-off-by: default avatarStephanos Ioannidis <root@stephanos.io>
parent adced0c2

arch/arm/core/cortex_a_r/__aeabi_read_tp.S

+1 −1
Original line number Diff line number Diff line
@@ -14,5 +14,5 @@ SECTION_FUNC(text, __aeabi_read_tp) 
	/*

	 * TPIDRURW will be used as a base pointer point to TLS aera.

	 */

	mrc 15, 0, r0, c13, c0, 2

	mrc p15, 0, r0, c13, c0, 2

	bx lr

arch/arm/core/cortex_a_r/swap_helper.S

+1 −1
Original line number Diff line number Diff line
@@ -126,7 +126,7 @@ out_fp_inactive: 
     * TPIDRURW is used as a base pointer to all

     * thread variables with offsets added by toolchain.

     */

    mcr 15, 0, r0, c13, c0, 2

    mcr p15, 0, r0, c13, c0, 2

#endif



#if defined(CONFIG_ARM_STORE_EXC_RETURN)

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