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Commit ca72a0a4 authored by Jimmy Zheng's avatar Jimmy Zheng Committed by Fabio Baltieri
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dts: riscv: andes_v5: update andes_v5_ae350.dtsi 



Fix mtimer lack of interrupts-extended and make syscon compatilbe to
atcsmu100.

Signed-off-by: default avatarJimmy Zheng <jimmyzhe@andestech.com>
parent ea2aac6e
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