Commit c601f3be authored by Alexander Wachter's avatar Alexander Wachter Committed by Anas Nashif
Browse files

can: Add can support for STM32L432 



This commit enables CAN on the STM32L432.
Tested on nucleo l432ck with external transceiver and loopback mode.

Signed-off-by: default avatarAlexander Wachter <alexander.wachter@student.tugraz.at>
parent ebc31f62

arch/arm/soc/st_stm32/stm32l4/dts.fixup

+14 −0
Original line number Diff line number Diff line
@@ -131,4 +131,18 @@ 
#define CONFIG_PWM_STM32_17_DEV_NAME            ST_STM32_PWM_40014800_PWM_LABEL

#define CONFIG_PWM_STM32_17_PRESCALER           ST_STM32_PWM_40014800_PWM_ST_PRESCALER



#define CONFIG_CAN_1_BASE_ADDRESS		ST_STM32_CAN_40006400_BASE_ADDRESS

#define CONFIG_CAN_1_BUS_SPEED			ST_STM32_CAN_40006400_BUS_SPEED

#define CONFIG_CAN_1_NAME			ST_STM32_CAN_40006400_LABEL

#define CONFIG_CAN_1_IRQ_TX			ST_STM32_CAN_40006400_IRQ_TX

#define CONFIG_CAN_1_IRQ_RX0			ST_STM32_CAN_40006400_IRQ_RX0

#define CONFIG_CAN_1_IRQ_RX1			ST_STM32_CAN_40006400_IRQ_RX1

#define CONFIG_CAN_1_IRQ_SCE			ST_STM32_CAN_40006400_IRQ_SCE

#define CONFIG_CAN_1_IRQ_PRIORITY		ST_STM32_CAN_40006400_IRQ_0_PRIORITY

#define CONFIG_CAN_1_SJW			ST_STM32_CAN_40006400_SJW

#define CONFIG_CAN_1_PROP_SEG_PHASE_SEG1	ST_STM32_CAN_40006400_PROP_SEG_PHASE_SEG1

#define CONFIG_CAN_1_PHASE_SEG2			ST_STM32_CAN_40006400_PHASE_SEG2

#define CONFIG_CAN_1_CLOCK_BUS			ST_STM32_CAN_40006400_CLOCK_BUS

#define CONFIG_CAN_1_CLOCK_BITS			ST_STM32_CAN_40006400_CLOCK_BITS



/* End of SoC Level DTS fixup file */

boards/arm/nucleo_l432kc/nucleo_l432kc.dts

+7 −0
Original line number Diff line number Diff line
@@ -54,3 +54,10 @@ 
		status = "ok";

	};

};



&can1 {

	pinctrl-0 = <&can_pins_a>;

	pinctrl-names = "default";

	bus-speed = <250000>;

	status = "ok";

};

boards/arm/nucleo_l432kc/pinmux.c

+4 −0
Original line number Diff line number Diff line
@@ -36,6 +36,10 @@ static const struct pin_config pinconf[] = { 
	{STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO},

	{STM32_PIN_PA7, STM32L4X_PINMUX_FUNC_PA7_SPI1_MOSI},

#endif /* CONFIG_SPI_1 */

#ifdef CONFIG_CAN_1

	{STM32_PIN_PA11, STM32L4X_PINMUX_FUNC_PA11_CAN_RX},

	{STM32_PIN_PA12, STM32L4X_PINMUX_FUNC_PA12_CAN_TX},

#endif /* CONFIG_CAN_1 */

};



static int pinmux_stm32_init(struct device *port)

drivers/pinmux/stm32/pinmux_stm32l4x.h

+4 −0
Original line number Diff line number Diff line
@@ -41,6 +41,10 @@ 
	(STM32_PINMUX_ALT_FUNC_1 | STM32_PUSHPULL_NOPULL)

#define STM32L4X_PINMUX_FUNC_PA15_USART2_RX \

	(STM32_PINMUX_ALT_FUNC_3 | STM32_PUPDR_NO_PULL)

#define STM32L4X_PINMUX_FUNC_PA11_CAN_RX \

	(STM32_PINMUX_ALT_FUNC_9 | STM32_PUSHPULL_NOPULL)

#define STM32L4X_PINMUX_FUNC_PA12_CAN_TX \

	(STM32_PINMUX_ALT_FUNC_9 | STM32_PUSHPULL_NOPULL)



/* Port B */

#define STM32L4X_PINMUX_FUNC_PB3_SPI1_SCK   \

dts/arm/st/stm32l4-pinctrl.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -57,6 +57,12 @@ 
					tx = <STM32_PIN_PB10 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>;

				};

			};

			can_pins_a: can@0 {

				rx_tx {

					rx = <STM32_PIN_PA11 (STM32_PINMUX_ALT_FUNC_9 | STM32_PUPDR_PULL_UP)>;

					tx = <STM32_PIN_PA12 (STM32_PINMUX_ALT_FUNC_9 | STM32_PUSHPULL_NOPULL)>;

				};

			};

		};

	};

};

CRA Git | Maintained and supported by SUSTech CRA and CCSE