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Commit c0907762 authored by Anas Nashif's avatar Anas Nashif
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sam_e70: enable instruction and data caches on sam_e70 



The Cortex-M7 CPU included in the SAM e70 SoCs has instruction and data
caches that significantly boost the performances. Enable them during the
SoC initialization.

Fixes #8138

Signed-off-by: default avatarAnas Nashif <anas.nashif@intel.com>
parent f72c4c52
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