Commit c084c0e7 authored by Scott Worley's avatar Scott Worley Committed by Benjamin Cabé
Browse files

tests: arch: arm: arm_irq_vector_table: Microchip MEC build fix 



Running twister with plaform Microchip mec_assy6941/<variant_name>
builds the arm_irq_vector_table test. Microchip mec_assy6941 boards
all use a 32-bit 32 KHz timer for the kernel. The test build fails
due to any board using a custom kernel timer driver requires the
test to include a chip specific interrupt table. We don't want to
exclude the test. The MEC chips include Cortex-M4 SysTick. We added
board overlays to the test turning off the 32KHz timer and enabling
ARM SysTick. The test now builds.

Signed-off-by: default avatarScott Worley <scott.worley@microchip.com>
parent 166bf18d

tests/arch/arm/arm_irq_vector_table/boards/mec_assy6941_mec1743_qlj.overlay

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/*

 * Copyright (c) 2025 Microchip Technology Inc.

 *

 * SPDX-License-Identifier: Apache-2.0

 */



/* Microchip MEC use its 32 KHz based RTOS timer by default.

 * Allow the test to build by switching to Cortex-M4 SysTick.

 */



&rtimer {

	status = "disabled";

};



&systick {

	status = "okay";

};

tests/arch/arm/arm_irq_vector_table/boards/mec_assy6941_mec1743_qsz.overlay

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+17 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2025 Microchip Technology Inc.

 *

 * SPDX-License-Identifier: Apache-2.0

 */



/* Microchip MEC use its 32 KHz based RTOS timer by default.

 * Allow the test to build by switching to Cortex-M4 SysTick.

 */



&rtimer {

	status = "disabled";

};



&systick {

	status = "okay";

};

tests/arch/arm/arm_irq_vector_table/boards/mec_assy6941_mec1753_qlj.overlay

0 → 100644
+17 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2025 Microchip Technology Inc.

 *

 * SPDX-License-Identifier: Apache-2.0

 */



/* Microchip MEC use its 32 KHz based RTOS timer by default.

 * Allow the test to build by switching to Cortex-M4 SysTick.

 */



&rtimer {

	status = "disabled";

};



&systick {

	status = "okay";

};

tests/arch/arm/arm_irq_vector_table/boards/mec_assy6941_mec1753_qsz.overlay

0 → 100644
+17 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2025 Microchip Technology Inc.

 *

 * SPDX-License-Identifier: Apache-2.0

 */



/* Microchip MEC use its 32 KHz based RTOS timer by default.

 * Allow the test to build by switching to Cortex-M4 SysTick.

 */



&rtimer {

	status = "disabled";

};



&systick {

	status = "okay";

};

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