intel_adsp: Introduce ACE 4.0 architecture with NVL/NVL-S platforms

Introduce the ACE 4.0 architecture, along with support for the NVL and
NVL-S platforms within the Intel ADSP framework in the Zephyr project.

This update includes:

- Addition of ACE 4.0 architecture configurations in Kconfig and
  Kconfig.intel_adsp.
- Inclusion of device tree source files for NVL and NVL-S platforms,
  defining CPU, memory, and peripheral configurations.
- Updates to driver files to support ACE 4.0 specific features,
  including DMIC and SSP configurations.
- Introduction of new header files for ACE 4.0, detailing boot,
  interrupt, IPC, power, and shim functionalities.
- Modifications to the CMakeLists.txt to include ACE 4.0 MMU support.
- Addition of default configurations for NVL and NVL-S platforms in
  Kconfig.defconfig.ace40.

The NVL and NVL-S platforms are part of the Nova Lake series, targeting
advanced audio processing capabilities. ACE 4.0 introduces enhanced DSP
capabilities and advanced power management features, improving audio
stream handling and synchronization compared to ACE 3.0.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>