drivers: serial: uart_xlnx_uartlite: set irq flags per device tree

PG142 from AMD specifically says the uartlite IP generates a
"rising-edge sensitive interrupt" when interrupts are enabled. When
using this IP on a ZynqMP platform with
CONFIG_UART_INTERRUPT_DRIVEN enabled, the GIC does not get
configured correctly to detect these interrupts. Update driver to heed
the flags set by the interrupts property in the device tree.

Signed-off-by: Michael Estes <michael.estes@byteserv.io>