Commit b7b8b273 authored Jun 11, 2025 by Grzegorz Swiderski Committed by Fabio Baltieri Jul 24, 2025

boards: nrf54h20dk: Limit app core FLASH_LOAD_SIZE

CONFIG_USE_DT_CODE_PARTITION had to be disabled to add MCUboot support.
As a result, CONFIG_FLASH_LOAD_SIZE was left at zero, which means that
the linker would claim all available MRAM for the app core.

For now, we can't allow that, because the default nRF54H20 DK memory map
divides MRAM between multiple cores in order to support various samples.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>

parent b4c18e89

boards/nordic/nrf54h20dk/Kconfig.defconfig

+7 −0

Original line number	Diff line number	Diff line
		@@ -22,6 +22,13 @@ if !USE_DT_CODE_PARTITION
		config FLASH_LOAD_OFFSET
		default $(dt_nodelabel_reg_addr_hex,cpuapp_boot_partition)

		# This is meant to span 'cpuapp_boot_partition' and 'cpuapp_slot0_partition'
		# in the default memory map.
		config FLASH_LOAD_SIZE
		default $(add_hex, $(dt_nodelabel_reg_addr_hex,cpuapp_slot0_partition), \
		$(dt_nodelabel_reg_size_hex,cpuapp_slot0_partition), \
		-$(dt_nodelabel_reg_addr_hex,cpuapp_boot_partition))

		endif # !USE_DT_CODE_PARTITION

		endif # BOARD_NRF54H20DK_NRF54H20_CPUAPP

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