Commit b4c18e89 authored by Grzegorz Swiderski's avatar Grzegorz Swiderski Committed by Fabio Baltieri
Browse files

boards: nrf54h20dk: Merge iron variants into the base variants 



This replaces the legacy SDFW compatible board configuration with the
IronSide SE compatible one, thus removing support for running samples
and tests on nRF54H20 devices with the old firmware.

All applications are expected to work on `nrf54h20dk/nrf54h20/cpuapp`
out of the box. For other board targets, all applications are expected
to boot, but may require additional peripheral configuration in UICR.
Build system support for the new UICR format is to be added separately.

Co-authored-by: default avatarJonathan Nilsen <jonathan.nilsen@nordicsemi.no>
Signed-off-by: default avatarJonathan Nilsen <jonathan.nilsen@nordicsemi.no>
Signed-off-by: default avatarGrzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
parent 559ace1c

boards/nordic/nrf54h20dk/Kconfig.defconfig

+13 −15
Original line number Diff line number Diff line
@@ -12,28 +12,26 @@ config BT_HCI_IPC 
config MAX_THREAD_BYTES

	default 3 if USERSPACE



endif # BOARD_NRF54H20DK_NRF54H20_CPUAPP



if BOARD_NRF54H20DK_NRF54H20_CPURAD



config MAX_THREAD_BYTES

	default 3 if USERSPACE



endif # BOARD_NRF54H20DK_NRF54H20_CPURAD



if BOARD_NRF54H20DK_NRF54H20_CPUAPP_IRON



config ROM_START_OFFSET

	default 0x800 if BOOTLOADER_MCUBOOT



if !USE_DT_CODE_PARTITION



# Application core firmware must start at this offset when not using MCUboot.

# However, the default 'zephyr,code-partition' in DT is set for MCUboot.

config FLASH_LOAD_OFFSET

	default 0x2c000 if !USE_DT_CODE_PARTITION

	default $(dt_nodelabel_reg_addr_hex,cpuapp_boot_partition)



endif # BOARD_NRF54H20DK_NRF54H20_CPUAPP_IRON

endif # !USE_DT_CODE_PARTITION



if BOARD_NRF54H20DK_NRF54H20_CPURAD_IRON

endif # BOARD_NRF54H20DK_NRF54H20_CPUAPP



if BOARD_NRF54H20DK_NRF54H20_CPURAD



config MAX_THREAD_BYTES

	default 3 if USERSPACE



config ROM_START_OFFSET

	default 0x800 if BOOTLOADER_MCUBOOT



endif # BOARD_NRF54H20DK_NRF54H20_CPURAD_IRON
 
endif # BOARD_NRF54H20DK_NRF54H20_CPURAD

boards/nordic/nrf54h20dk/Kconfig.nrf54h20dk

+2 −6
Original line number Diff line number Diff line
@@ -2,13 +2,9 @@ 
# SPDX-License-Identifier: Apache-2.0



config BOARD_NRF54H20DK

	select SOC_NRF54H20_CPUAPP if (BOARD_NRF54H20DK_NRF54H20_CPUAPP || \

				       BOARD_NRF54H20DK_NRF54H20_CPUAPP_IRON)

	select SOC_NRF54H20_CPURAD if (BOARD_NRF54H20DK_NRF54H20_CPURAD || \

				       BOARD_NRF54H20DK_NRF54H20_CPURAD_IRON)

	select SOC_NRF54H20_CPUAPP if BOARD_NRF54H20DK_NRF54H20_CPUAPP

	select SOC_NRF54H20_CPURAD if BOARD_NRF54H20DK_NRF54H20_CPURAD

	select SOC_NRF54H20_CPUPPR if (BOARD_NRF54H20DK_NRF54H20_CPUPPR || \

				       BOARD_NRF54H20DK_NRF54H20_CPUPPR_XIP)

	select SOC_NRF54H20_CPUFLPR if (BOARD_NRF54H20DK_NRF54H20_CPUFLPR || \

				        BOARD_NRF54H20DK_NRF54H20_CPUFLPR_XIP)
 
	select SOC_NRF54H20_IRON if (BOARD_NRF54H20DK_NRF54H20_CPUAPP_IRON || \

				       BOARD_NRF54H20DK_NRF54H20_CPURAD_IRON)

boards/nordic/nrf54h20dk/board.cmake

+2 −5
Original line number Diff line number Diff line
@@ -2,10 +2,7 @@ 


include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake)



if(CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP OR

   CONFIG_BOARD_NRF54H20DK_NRF54H20_CPURAD OR

   CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP_IRON OR

   CONFIG_BOARD_NRF54H20DK_NRF54H20_CPURAD_IRON)

if(CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP OR CONFIG_BOARD_NRF54H20DK_NRF54H20_CPURAD)

  if(CONFIG_SOC_NRF54H20_CPUAPP)

    set(JLINKSCRIPTFILE ${CMAKE_CURRENT_LIST_DIR}/support/nrf54h20_cpuapp.JLinkScript)

  else()
@@ -17,7 +14,7 @@ if(CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP OR 
endif()



if(CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUPPR OR CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUFLPR)

  if(CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUPPR)

  if(CONFIG_SOC_NRF54H20_CPUPPR)

    set(JLINKSCRIPTFILE ${CMAKE_CURRENT_LIST_DIR}/support/nrf54h20_cpuppr.JLinkScript)

  else()

    set(JLINKSCRIPTFILE ${CMAKE_CURRENT_LIST_DIR}/support/nrf54h20_cpuflpr.JLinkScript)

boards/nordic/nrf54h20dk/board.yml

+0 −4
Original line number Diff line number Diff line
@@ -9,10 +9,6 @@ board: 
      cpucluster: cpuppr

    - name: xip

      cpucluster: cpuflpr

    - name: iron

      cpucluster: cpuapp

    - name: iron

      cpucluster: cpurad

  revision:

    format: major.minor.patch

    default: "0.9.0"

boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-ipc_conf.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -7,17 +7,17 @@ 
/ {

	ipc {

		cpusec_cpuapp_ipc: ipc-1-2 {

			compatible = "zephyr,ipc-icmsg";

			compatible = "nordic,ironside-call";

			status = "disabled";

			dcache-alignment = <32>;

			memory-region = <&cpusec_cpuapp_ipc_shm>;

			mboxes = <&cpusec_bellboard 12>,

				 <&cpuapp_bellboard 0>;

		};



		cpusec_cpurad_ipc: ipc-1-3 {

			compatible = "zephyr,ipc-icmsg";

			compatible = "nordic,ironside-call";

			status = "disabled";

			dcache-alignment = <32>;

			memory-region = <&cpusec_cpurad_ipc_shm>;

			mboxes = <&cpusec_bellboard 18>,

				 <&cpurad_bellboard 0>;

		};

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