it8xxx2: support relocating ISR code to RAM

IT8xxx2 uses a relatively slow SPI flash for ROM with a small 4k
I-cache. As a result in large or busy applications, instruction fetch
can be very costly due to I-cache misses. Since exception handling code
is some of the hottest code in most applications, add an option (enabled
by default) causing that code to execute out of RAM in order to improve
performance.

This is very similar to exception section placement on XIP niosii
platforms (which has similar motivation), but can still be disabled by
configuration.

Signed-off-by: Peter Marheine <pmarheine@chromium.org>