Commit a6364da1 authored by Iuliana Prodan's avatar Iuliana Prodan Committed by Anas Nashif
Browse files

arch: xtensa: add workaround for small vector table entries 



For some platforms, like NXP's IMX8 or Mediatek's MT8195,
the size of an interrupt vector table entry is 0x1C bytes,
less than usual (0x30 for Intel's platforms).
So, the interrupt handlers don't fit in the vector table
entries.

I've added a small indirection to bypass this size
constraint and moved the default handlers to the end
of vector table, renaming them to
_Level\LVL\()VectorHelper.
For this, I've added a generic configuration -
XTENSA_SMALL_VECTOR_TABLE_ENTRY.

Signed-off-by: default avatarIuliana Prodan <iuliana.prodan@nxp.com>
parent f0ea22b5

arch/xtensa/Kconfig

+8 −0
Original line number Diff line number Diff line
@@ -90,4 +90,12 @@ config XTENSA_WAITI_BUG 
	  platforms which prefixes a WAITI entry with 128 NOP

	  instructions followed by an ISYNC and EXTW.



config XTENSA_SMALL_VECTOR_TABLE_ENTRY

	bool "Enable workaround for small vector table entries"

	help

	  This option enables a small indirection to bypass the size

	  constraint of the vector table entry and moved the default

	  handlers to the end of vector table, renaming them to

	  _Level\LVL\()VectorHelper.



endmenu

arch/xtensa/include/xtensa-asm2-s.h

+2 −2
Original line number Diff line number Diff line
@@ -356,7 +356,7 @@ _restore_\@: 
 * with a simple jump instruction.

 */

.macro DEF_EXCINT LVL, ENTRY_SYM, C_HANDLER_SYM

#if defined(CONFIG_IMX) && (MEM_VECT_TEXT_SIZE <= 0x1C)

#if defined(CONFIG_XTENSA_SMALL_VECTOR_TABLE_ENTRY)

.pushsection .iram.text, "ax"

.global _Level\LVL\()VectorHelper

_Level\LVL\()VectorHelper :
@@ -425,7 +425,7 @@ _after_imms\LVL: 
	jx a0

.popsection



#if defined(CONFIG_IMX) && (MEM_VECT_TEXT_SIZE <= 0x1C)

#if defined(CONFIG_XTENSA_SMALL_VECTOR_TABLE_ENTRY)

.if \LVL == 1

.pushsection .iram0.text, "ax"

.elseif \LVL == XCHAL_DEBUGLEVEL

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