soc: riscv: cleanup usage/definition of MCAUSE IRQ flag

The MCAUSE register has the "Interrupt" flag defined defined at XLEN-1
position (31 for 32-bit, 63 for 64-bit). This is not an SoC specific
option, and there's no need to expose it publicly.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>