tests: drivers: clock_control of the stm32h5 core

Adapt the clock scheme for testing the clock on the stm32h573i_dk.
By default the HSI is 32MHz (div-by-2).
Only scheme for pll sourced by HSI is useful at max freq of 240MHz.
Configure the usart1-console clock to be csi  to always get
a valid clock source in any usecase.

Signed-off-by: Francois Ramu <francois.ramu@st.com>