drivers: clock_control: no PLLEN on some stm32 soc

Some stm32 devices, like stm32F4, do not have
a PLL Enable bit on the PLLP nor PLLQ divider
in their PLL config register (PLLCFGR).
The result is a empty function.

Signed-off-by: Francois Ramu <francois.ramu@st.com>