drivers: entropy: stm32: Check clock config at runtime

RNG clock configuration constraints differ between each series.
Rather than providing complex build time code to verify RNG clock
configuration is correct, take advantage of CECS bit (Clock error
current status) to assess clock configuration.

This check is implemented under a specific ENTROPY_STM32_CLK_CHECK
Kconfig option. This allows user to disable this feature in specific
conditions:
- CED bit disabled in application (in which case CECS status is not valid)
- Clock configuration is deemed as correct by user. Note that RNG number
  are always generated, whatever the clock status.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>