drivers: clock: stm32: fix Flash latency & clock settings for MSI & HSE

According to RM, when increasing the CPU frequency, the new number of
wait states to the Flash latency bits must be written and verified
before modifying the CPU clock source and/or the CPU clock prescaler,
to prevent NMI to occur; when decreasing the CPU frequency, after.
Tested with STM32L462 SOC and MSI with several frequencies, both
increasing and decreasing. HSE built, not tested.

Signed-off-by: Giancarlo Stasi <giancarlo.stasi@nexxiot.com>