dts: rv32m1: Rework interrupt mux dts descriptions

Each intmux block acts like 8 interrupt controllers in which we can
have multiple device interrupts on a single channel and that channel
than interrupt than chained to another interrupt controller (in the
case of the RISC-V cores, it is the event unit).

So to describe things better to properly be able to walk the interrupt
chain in the device tree we treat each channel in the interrupt mux as
an interrupt controller rather than the intmux as a single interrupt
controller.

In the future this will allow the device tree generation code to walk
the interrupt chain from the device and up through any interrupt
controllers to generate the IRQ value that Zephyr expects (rather than
us hard coding this into the DTS).

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>