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Commit 7f748259 authored by Nicolas Pitre's avatar Nicolas Pitre Committed by Kumar Gala
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riscv: add a qemu_riscv64 board



This emulates a RISC-V in 64-bit mode on a SiFive FE310 dev board.
Memory is tight so a few tests had to be disabled due to the extra
memory usage compared to qemu_riscv32.

Signed-off-by: default avatarNicolas Pitre <npitre@baylibre.com>
parent c351492b
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