Commit 7ac8dd87 authored by Pierre-Emmanuel Novac's avatar Pierre-Emmanuel Novac Committed by Carles Cufi
Browse files

drivers/clock_control: stm32: Configure MCO1 on STM32F1 

MCO1 is also available on STM32F1 series (on top of STM32F4), allow
selection of MCO1 source with CLOCK_STM32_MCO1_SRC_* Kconfig parameters.
Available MCO1 sources are slightly different between STM32F4
(LSE, HSE, HSI, PLLCLK) and STM32F103 (HSE, HSI, PLLCLK/2, SYSCLK), and
STM32F105/F107 have a few more (EXT_HSE, PLL2CLK, PLLI2SCLK, PLLI2SCLK/2).
MCO1 on STM32F1 does not have a configurable divider (unlike STM32F4),
HAL call only configures source.
STM32F1 do not have MCO2.

Signed-off-by: default avatarPierre-Emmanuel Novac <piernov@piernov.org>
parent 64eb350e

drivers/clock_control/Kconfig.stm32

+38 −3
Changes for drivers/clock_control/Kconfig.stm32: 38 added lines, 3 removed lines.
Original line number Diff line number Diff line
@@ -54,6 +54,12 @@ config CLOCK_STM32_MCO1_SRC_NOCLOCK 
	help

	  MCO1 output disabled, no clock on MCO1



config CLOCK_STM32_MCO1_SRC_EXT_HSE

	bool "EXT_HSE"

	depends on SOC_STM32F10X_CONNECTIVITY_LINE_DEVICE

	help

	  Use EXT_HSE as source of MCO1



config CLOCK_STM32_MCO1_SRC_LSE

	bool "LSE"

	depends on SOC_SERIES_STM32F4X
@@ -62,13 +68,13 @@ config CLOCK_STM32_MCO1_SRC_LSE 


config CLOCK_STM32_MCO1_SRC_HSE

	bool "HSE"

	depends on SOC_SERIES_STM32F4X

	depends on SOC_SERIES_STM32F1X || SOC_SERIES_STM32F4X

	help

	  Use HSE as source of MCO1



config CLOCK_STM32_MCO1_SRC_HSI

	bool "HSI"

	depends on SOC_SERIES_STM32F4X

	depends on SOC_SERIES_STM32F1X || SOC_SERIES_STM32F4X

	help

	  Use HSI as source of MCO1
@@ -78,11 +84,40 @@ config CLOCK_STM32_MCO1_SRC_PLLCLK 
	help

	  Use PLLCLK as source of MCO1



config CLOCK_STM32_MCO1_SRC_PLLCLK_DIV2

	bool "PLLCLK_DIV2"

	depends on SOC_SERIES_STM32F1X

	help

	  Use PLLCLK/2 as source of MCO1



config CLOCK_STM32_MCO1_SRC_PLL2CLK

	bool "PLL2CLK"

	depends on SOC_STM32F10X_CONNECTIVITY_LINE_DEVICE

	help

	  Use PLL2CLK as source of MCO1



config CLOCK_STM32_MCO1_SRC_PLLI2SCLK

	bool "PLLI2SCLK"

	depends on SOC_STM32F10X_CONNECTIVITY_LINE_DEVICE

	help

	  Use PLLI2SCLK as source of MCO1



config CLOCK_STM32_MCO1_SRC_PLLI2SCLK_DIV2

	bool "PLLI2SCLK_DIV2"

	depends on SOC_STM32F10X_CONNECTIVITY_LINE_DEVICE

	help

	  Use PLLI2SCLK/2 as source of MCO1



config CLOCK_STM32_MCO1_SRC_SYSCLK

	bool "SYSCLK"

	depends on SOC_SERIES_STM32F1X

	help

	  Use SYSCLK as source of MCO1

endchoice



config CLOCK_STM32_MCO1_DIV

	int "MCO1 prescaler"

	depends on !CLOCK_STM32_MCO1_SRC_NOCLOCK

	depends on SOC_SERIES_STM32F4X && !CLOCK_STM32_MCO1_SRC_NOCLOCK

	default 1

	range 1   5

	help

drivers/clock_control/clock_stm32_ll_common.c

+4 −0
Changes for drivers/clock_control/clock_stm32_ll_common.c: 4 added lines, 0 removed lines.
Original line number Diff line number Diff line
@@ -430,8 +430,12 @@ static void stm32_clock_switch_to_hsi(void) 
static inline void stm32_clock_control_mco_init(void)

{

#ifndef CONFIG_CLOCK_STM32_MCO1_SRC_NOCLOCK

#ifdef CONFIG_SOC_SERIES_STM32F1X

	LL_RCC_ConfigMCO(MCO1_SOURCE);

#else

	LL_RCC_ConfigMCO(MCO1_SOURCE,

			 mco1_prescaler(CONFIG_CLOCK_STM32_MCO1_DIV));

#endif

#endif /* CONFIG_CLOCK_STM32_MCO1_SRC_NOCLOCK */



#ifndef CONFIG_CLOCK_STM32_MCO2_SRC_NOCLOCK

drivers/clock_control/clock_stm32_ll_common.h

+12 −0
Changes for drivers/clock_control/clock_stm32_ll_common.h: 12 added lines, 0 removed lines.
Original line number Diff line number Diff line
@@ -12,6 +12,8 @@ 


#if CONFIG_CLOCK_STM32_MCO1_SRC_NOCLOCK

	#define MCO1_SOURCE		LL_RCC_MCO1SOURCE_NOCLOCK

#elif CONFIG_CLOCK_STM32_MCO1_SRC_EXT_HSE

	#define MCO1_SOURCE		LL_RCC_MCO1SOURCE_EXT_HSE

#elif CONFIG_CLOCK_STM32_MCO1_SRC_LSE

	#define MCO1_SOURCE		LL_RCC_MCO1SOURCE_LSE

#elif CONFIG_CLOCK_STM32_MCO1_SRC_HSE
@@ -20,6 +22,16 @@ 
	#define MCO1_SOURCE		LL_RCC_MCO1SOURCE_HSI

#elif CONFIG_CLOCK_STM32_MCO1_SRC_PLLCLK

	#define MCO1_SOURCE		LL_RCC_MCO1SOURCE_PLLCLK

#elif CONFIG_CLOCK_STM32_MCO1_SRC_PLLCLK_DIV2

	#define MCO1_SOURCE		LL_RCC_MCO1SOURCE_PLLCLK_DIV_2

#elif CONFIG_CLOCK_STM32_MCO1_SRC_PLL2CLK

	#define MCO1_SOURCE		LL_RCC_MCO1SOURCE_PLL2CLK

#elif CONFIG_CLOCK_STM32_MCO1_SRC_PLLI2SCLK

	#define MCO1_SOURCE		LL_RCC_MCO1SOURCE_PLLI2SCLK

#elif CONFIG_CLOCK_STM32_MCO1_SRC_PLLI2SCLK_DIV2

	#define MCO1_SOURCE		LL_RCC_MCO1SOURCE_PLLI2SCLK_DIV2

#elif CONFIG_CLOCK_STM32_MCO1_SRC_SYSCLK

	#define MCO1_SOURCE		LL_RCC_MCO1SOURCE_SYSCLK

#endif



#if CONFIG_CLOCK_STM32_MCO2_SRC_SYSCLK

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