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Commit 6d49e7c6 authored by Daniel Leung's avatar Daniel Leung Committed by Anas Nashif
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timer: add CAVS DSP wall clock timer for Intel SoC



The DSP wall clock timer on some Intel SoC is a timer driven
directly by external oscillator and is external to the CPU
core(s). It is not as fast as the internal core clock, but
provides a common and synchronized counter for all CPU cores
(which is useful for SMP).

This uses the RISCV timer as base as it is using 64-bit
counter.

Signed-off-by: default avatarDaniel Leung <daniel.leung@intel.com>
parent e6d468ac
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