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Commit 6c1afb07 authored by Armand Ciejak's avatar Armand Ciejak Committed by Maureen Helm
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drivers: eth: mcux: Write correct data into PHY_CONTROL2_REG register



Starting a SMI write operation without waiting for completion of the
preceding SMI read operation cause the write operation to fail if
the time between the 2 operations it too short. This leads to the
PHY being in an unusable state on the MIMRT1060-EVK eval board.

In addition the value of the register was not used, as consequence
some bits were not preserved.

The solution is to do a read/modify/write to set only the
ref clock bit, which sets the PHY into 50MHz clock mode,
and keep the value of the other bits.

Signed-off-by: default avatarArmand Ciejak <armand@riedonetworks.com>
parent c168f45e
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