timer: Add tickless support for the MIPS CP0 timer

This commit adds support for tickless operation on the MIPS CP0 timer.
The code closely follows the Xtensa and RISCV timer drivers.

All tests pass.

Signed-off-by: Remy Luisant <remy@luisant.ca>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>