dts/riscv/andes: add `andestech,andescore-v5` compatible string

This commit adds the `andestech,andescore-v5` compatible string. This helps
identify the core tpye form the final devicetree alone.

Andes doesn't define which core type from the v5 series the AE350 SoC uses,
so we're using the whole series name here.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>