boards/qemu/xtensa: fix `DCACHE_LINE_SIZE` value for `sample_controller32`

This commit adds a missing default value for the `DCHACHE_LINE_SIZE` option
for the `qemu_xtensa/sample_controller32/mpu` platform. This is required
after 8b39d4a6 added a build assert
checking this value against `core-isa.h` from Xtensa HAL.

Fixes #85591.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>