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Commit 5b17a6da authored by Khor Swee Aun's avatar Khor Swee Aun Committed by Anas Nashif
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soc: riscv: riscv-privilege: INTEL NIOSV support 



Add support for INTEL FPGA NIOSV RISCV based Processors.

Signed-off-by: default avatarKhor Swee Aun <swee.aun.khor@intel.com>
parent 938b152b
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