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Commit 4d778b78 authored by Stephanos Ioannidis's avatar Stephanos Ioannidis Committed by Maureen Helm
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soc: arm: xilinx_zynqmp: Use CMSIS-Core(R) 



This commit updates the `xilinx_zynqmp` SoC initialisation code to use
the CMSIS-Core(R) features.

In addition, it also defines the Core IP revision value for the SoC as
specified in the Zynq UltraScale+ Device Technical Reference Manual.

Signed-off-by: default avatarStephanos Ioannidis <root@stephanos.io>
parent efd6e4c3
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