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Commit 466a322f authored by Maureen Helm's avatar Maureen Helm Committed by Benjamin Cabé
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soc: adi: max32: Refactor core configuration



Refactors the max32 soc family configuration to allow socs with cores
other than arm cortex-m4. This will make it possible to add support for
the secondary risc-v core that exists on some max32 variants.

Signed-off-by: default avatarMaureen Helm <maureen.helm@analog.com>
parent a9c0fcaf
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