soc: adi: max32: Refactor core configuration
Refactors the max32 soc family configuration to allow socs with cores
other than arm cortex-m4. This will make it possible to add support for
the secondary risc-v core that exists on some max32 variants.
Signed-off-by:
Maureen Helm <maureen.helm@analog.com>
Loading
Please sign in to comment