Skip to content
Commit 453ee5e7 authored by Alex Porosanu's avatar Alex Porosanu Committed by Maureen Helm
Browse files

soc: riscv32: fix zero-riscy zephyr,flash node



For OpenVega board, in the case of the Zero Riscy core,
the flash partition used for the code and data is the
M0 ARM core's 256KB flash region. This is closest to
the RISC core.
The m0_flash node defines where the interrupt vector
is located for the Zero Riscy core, and one needs to
restrict the application so its interrupt vector is
placed accordingly.

Fixes: 34b05164 ("boards: riscv32: rv32m1_vega:
                      enable MCUboot for ri5cy core")

Signed-off-by: default avatarAlex Porosanu <alexandru.porosanu@nxp.com>
parent ea366e9a
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment