Commit 41dd6622 authored by Maureen Helm's avatar Maureen Helm Committed by Kumar Gala
Browse files

arm: Print NXP MPU error information in BusFault dump 



The NXP MPU triggers a bus fault when a memory access error occurs. Add
support in the bus fault handler to dump error details from the NXP MPU,
including the port number, mode (supervisor or user), address, bus
master number, and regions.

Signed-off-by: default avatarMaureen Helm <maureen.helm@nxp.com>
parent 889b290a

arch/arm/core/fault.c

+32 −0
Original line number Diff line number Diff line
@@ -38,6 +38,12 @@ 
	} while ((0))

#endif





#if defined(CONFIG_NXP_MPU)

#define EMN(edr)   (((edr) & SYSMPU_EDR_EMN_MASK) >> SYSMPU_EDR_EMN_SHIFT)

#define EACD(edr)  (((edr) & SYSMPU_EDR_EACD_MASK) >> SYSMPU_EDR_EACD_SHIFT)

#endif



#if defined(CONFIG_ARM_SECURE_FIRMWARE)



/* Exception Return (EXC_RETURN) is provided in LR upon exception entry.
@@ -350,6 +356,32 @@ static void _BusFault(const NANO_ESF *esf, int fromHardFault) 
	}

#endif /* !defined(CONFIG_ARMV7_M_ARMV8_M_FP) */



#if defined(CONFIG_NXP_MPU)

	u32_t sperr = SYSMPU->CESR & SYSMPU_CESR_SPERR_MASK;

	u32_t mask = BIT(31);

	int i;



	if (sperr) {

		for (i = 0; i < SYSMPU_EAR_COUNT; i++, mask >>= 1) {

			if (!(sperr & mask)) {

				continue;

			}

			STORE_xFAR(edr, SYSMPU->SP[i].EDR);

			STORE_xFAR(ear, SYSMPU->SP[i].EAR);



			PR_EXC("  NXP MPU error, port %d\n", i);

			PR_EXC("    Mode: %s, %s Address: 0x%x\n",

			       edr & BIT(2) ? "Supervisor" : "User",

			       edr & BIT(1) ? "Data" : "Instruction",

			       ear);

			PR_EXC("    Type: %s, Master: %d, Regions: 0x%x\n",

			       edr & BIT(0) ? "Write" : "Read",

			       EMN(edr), EACD(edr));

		}

		SYSMPU->CESR &= ~sperr;

	}

#endif /* CONFIG_NXP_MPU */



#if defined(CONFIG_ARMV8_M_MAINLINE)

	/* clear BSFR sticky bits */

	SCB->CFSR |= SCB_CFSR_BUSFAULTSR_Msk;

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