soc: riscv: andes_v5: introduce Andes V5 PMA to support nocache memory

Andes V5 PMA can let SW programmably configure memory attribute of
physical memory region. This commit enable CONFIG_NOCACHE_MEMORY of
Andes V5 CPUs based on the PMA. Use PMA region 0 to set whole nocache
section as uncached memory.

Signed-off-by: Jim Shu <cwshu@andestech.com>